Hovedkort som støtter Venice, San Diego og X2

[Dragavon]

Tom's Hardware har laget en oversikt over hvilke hovedkort som støtter de nye prosessorene.

 

LINK.

 

Interresante biter:

 

It should also be mentioned that AMD has implemented a hidden feature in Revision E processors, namely additional memory ratios that can be implemented in BIOS. We saw a Revision E chip mounted on the Abit Fatal1ty AN8 motherboard. Adding the new processor gave the additional options of 433, 466, and 500 to the available memory ratios. This has to be coded in the BIOS to be available, but the new asynchronous ratios are a feature of the Revision E Memory Controller.

 

Revision E Memory Controller PLUS 4 Dimms =

 

The memory timings, in the end, are controlled by the memory controller, and in the case of Athlon 64 that memory controller is on the processor. We had already been told by AMD that Rev. E would feature a new and improved memory controller. In fact for months prior to the release of the new Revision E Athlon 64 processors (Venice, San Diego, Toledo) we have been hearing that the new memory controller on the Rev. E chips would allow the use of 4 dimms at the faster 1T Command Rate.

 

With the 4200+ x2 in our DFI LANParty nForce4 SLI test bed with a working dual-core BIOS (6/23/05) we tried 4 matched PC3200 OCZ Platinum Rev. 2 dimms. Four dimms STILL requires a 2T command rate in this configuration, so the limitation stills remains. Four Dimms in a Rev. E still needs a Command Rate of 2.

 

Tenkte eg skulle poste dette, siden det har vore mange spørsmål om det i det siste.